模式0: 74ma     模式1: 20ma    

模式2: 1.5ma    模式3: 35μa

pin1

gnd

-

ground

pin2

gnd

-

ground

pin3

gpio10

i/o

gpio

pin4

gpio11

i/o

gpio

pin5

gpio14

i/o

gpio

pin6

gpio15

i/o

gpio

pin7

gpio16

i/o

gpio

pin8

gpio17

i/o

gpio

pin9

gpio12

i/o

gpio

pin10

gpio13

i/o

gpio

pin11

gpio22

i/o

gpio

pin12

jtag_tdi

i/o

jtag tdi input. leave unconnected if not used on product

pin13

flash_spi_miso

i

external serial flash programming: spi data in

pin14

flash_spi_ncs_in

i

external serial flash programming: spi chip select (active low)

pin15

flash_spi_clk

i

external serial flash programming: spi clock

pin16

gnd

-

ground

pin17

flash_spi_mosi

o

external serial flash programming: spi data out

pin18

jtag_tdo

i/o

jtag tdo output. leave unconnected if not used on product

pin19

gpio28

i/o

gpio

pin20

nc

-

-

pin21

jtag_tck

i/o

jtag tck input. leave unconnected if not used on product.(2)
an internal 100 kω pull down resistor is tied to this pin.

pin22

jtag_tms

-

jtag tms input. leave unconnected if not used on product.

pin23

sop2

-

an internal 100 kω pull down resistor is tied to this sop pin. an
external 10 kω resistor is required to pull this pin high. see
section 6.11.1 for sop[2:0] configuration modes.

pin24

sop1

-

an internal 100 kω pull down resistor is tied to this sop pin. an
external 10 kω resistor is required to pull this pin high. see
section 6.11.1 for sop[2:0] configuration modes.

pin25

gnd

-

ground

pin26

gnd

-

ground

pin27

gnd

-

ground

pin28

gnd

-

ground

pin29

gnd

-

ground

pin30

gnd

-

ground

pin31

rf_abg

i/o

ground

pin32

gnd

-

ground

pin33

nc

-

-

pin34

sop0

an internal 100 kω pull down resistor is tied to this sop pin. an
external 10 kω resistor is required to pull this pin high. see
section 6.11.1 for sop[2:0] configuration modes.

pin35

nreset

i

there is an internal, 100 kω, pull-up resistor option from the
nreset pin to vbat_reset. note: vbat_reset is not
connected to vbat1 or vbat2 within the module. the following
connection schemes are recommended:
• connect nreset to a switch, external controller, or host,
only if nreset will be in a defined state under all operating
conditions. leave vbat_reset unconnected to save
power.
• if nreset cannot be in a defined state under all operating
conditions, connect vbat_reset to the main module
power supply (vbat1 and vbat2). due to the internal pullup
resistor a leakage current of 3.3 v / 100 kω is expected.

pin36

vbat_reset

-

pin37

vbat1

power

power supply for the module, must be connected to battery (2.3
v to 3.6 v)

pin38

gnd

-

ground

pin39

nc

-

-

pin40

vbat2

power

power supply for the module, must be connected to battery (2.3
v to 3.6 v)

pin41

nc

-

-

pin42

gpio30

gpio

pin43

gnd

ground

pin44

gpio30

pin45

nc

-

-

pin46

gpio1

i/o

gpio

pin47

gpio2

i/o

gpio

pin48

gpio3

i/o

gpio

pin49

gpio4

i/o

gpio

pin50

gpio5

i/o

gpio

pin51

gpio6

i/o

gpio

pin52

gpio7

i/o

gpio

pin53

gpio8

i/o

gpio

pin54

gpio9

i/o

gpio

pin55

gnd

-

thermal ground

pin56

gnd

-

thermal ground

pin57

gnd

-

thermal ground

pin58

gnd

-

thermal ground

pin59

gnd

-

thermal ground

pin60

gnd

-

thermal ground

pin61

gnd

-

thermal ground

pin62

gnd

-

thermal ground

pin63

gnd

-

thermal ground